Thin polished plates such as silicon wafers and the like are a very important part of modern technology. A wafer, for instance, may refer to a thin slice of semiconductor material used in the fabrication of integrated circuits and other devices. Other examples of thin polished plates may include magnetic disc substrates, gauge blocks and the like. While the technique described here refers mainly to wafers, it is to be understood that the technique also is applicable to other types of polished plates as well. The term wafer and the term thin polished plate may be used interchangeably in the present disclosure.
Modern semiconductor devices are typically fabricated from layers of semiconductor, conductor or isolator material printed on wafers using various (e.g., photolithography) techniques. Precise positioning and alignment during semiconductor fabrication are of critical importance.
Currently available quality assurance methods may measure critical dimension (CD) and overlay on formal metrology targets in the scribe lanes between adjacent chips. Some recently developed quality assurance methods may also measure CD and overlay on suitable but randomly picked targets from within the layout of the chip based strictly on physical attributes of the chip. It is noted that these targets have no relation to the electrically critical design elements, and as such the measurements from such targets may not always reflect the dimensional fidelity or overlay on the critical design elements at all. On the contrary, when the electrically critical design elements show failure to perform during the end of line test, or worse in the actual customer usage, there is little probability that the data from these targets can explain such failures.